{
"@context": [
"http://api.conceptnet.io/ld/conceptnet5.7/context.ld.json"
],
"@id": "/c/en/semiconductor_wafer_processing_single_wafer",
"edges": [
{
"@id": "/a/[/r/IsA/,/c/en/contact_creation/n/,/c/en/semiconductor_wafer_processing_single_wafer/n/]",
"@type": "Edge",
"dataset": "/d/opencyc",
"end": {
"@id": "/c/en/semiconductor_wafer_processing_single_wafer/n",
"@type": "Node",
"label": "semiconductor wafer processing single wafer",
"language": "en",
"sense_label": "n",
"term": "/c/en/semiconductor_wafer_processing_single_wafer"
},
"license": "cc:by/4.0",
"rel": {
"@id": "/r/IsA",
"@type": "Relation",
"label": "IsA"
},
"sources": [
{
"@id": "/s/resource/opencyc/2012",
"@type": "Source",
"contributor": "/s/resource/opencyc/2012"
}
],
"start": {
"@id": "/c/en/contact_creation/n",
"@type": "Node",
"label": "contact creation",
"language": "en",
"sense_label": "n",
"term": "/c/en/contact_creation"
},
"surfaceText": null,
"weight": 1.0
},
{
"@id": "/a/[/r/IsA/,/c/en/substrate_preparation/n/,/c/en/semiconductor_wafer_processing_single_wafer/n/]",
"@type": "Edge",
"dataset": "/d/opencyc",
"end": {
"@id": "/c/en/semiconductor_wafer_processing_single_wafer/n",
"@type": "Node",
"label": "semiconductor wafer processing single wafer",
"language": "en",
"sense_label": "n",
"term": "/c/en/semiconductor_wafer_processing_single_wafer"
},
"license": "cc:by/4.0",
"rel": {
"@id": "/r/IsA",
"@type": "Relation",
"label": "IsA"
},
"sources": [
{
"@id": "/s/resource/opencyc/2012",
"@type": "Source",
"contributor": "/s/resource/opencyc/2012"
}
],
"start": {
"@id": "/c/en/substrate_preparation/n",
"@type": "Node",
"label": "substrate preparation",
"language": "en",
"sense_label": "n",
"term": "/c/en/substrate_preparation"
},
"surfaceText": null,
"weight": 1.0
},
{
"@id": "/a/[/r/IsA/,/c/en/photoresist_development/n/,/c/en/semiconductor_wafer_processing_single_wafer/n/]",
"@type": "Edge",
"dataset": "/d/opencyc",
"end": {
"@id": "/c/en/semiconductor_wafer_processing_single_wafer/n",
"@type": "Node",
"label": "semiconductor wafer processing single wafer",
"language": "en",
"sense_label": "n",
"term": "/c/en/semiconductor_wafer_processing_single_wafer"
},
"license": "cc:by/4.0",
"rel": {
"@id": "/r/IsA",
"@type": "Relation",
"label": "IsA"
},
"sources": [
{
"@id": "/s/resource/opencyc/2012",
"@type": "Source",
"contributor": "/s/resource/opencyc/2012"
}
],
"start": {
"@id": "/c/en/photoresist_development/n",
"@type": "Node",
"label": "photoresist development",
"language": "en",
"sense_label": "n",
"term": "/c/en/photoresist_development"
},
"surfaceText": null,
"weight": 1.0
},
{
"@id": "/a/[/r/ExternalURL/,/c/en/semiconductor_wafer_processing_single_wafer/n/,/http://sw.opencyc.org/2012/05/10/concept/en/SemiconductorWaferProcessing_SingleWafer/]",
"@type": "Edge",
"dataset": "/d/opencyc",
"end": {
"@id": "http://sw.opencyc.org/2012/05/10/concept/en/SemiconductorWaferProcessing_SingleWafer",
"@type": "Node",
"label": "SemiconductorWaferProcessing SingleWafer",
"path": "/2012/05/10/concept/en/SemiconductorWaferProcessing_SingleWafer",
"site": "sw.opencyc.org",
"site_available": false,
"term": "http://sw.opencyc.org/2012/05/10/concept/en/SemiconductorWaferProcessing_SingleWafer"
},
"license": "cc:by/4.0",
"rel": {
"@id": "/r/ExternalURL",
"@type": "Relation",
"label": "ExternalURL"
},
"sources": [
{
"@id": "/s/resource/opencyc/2012",
"@type": "Source",
"contributor": "/s/resource/opencyc/2012"
}
],
"start": {
"@id": "/c/en/semiconductor_wafer_processing_single_wafer/n",
"@type": "Node",
"label": "semiconductor wafer processing single wafer",
"language": "en",
"sense_label": "n",
"term": "/c/en/semiconductor_wafer_processing_single_wafer"
},
"surfaceText": null,
"weight": 1.0
},
{
"@id": "/a/[/r/IsA/,/c/en/solder_bump_creation/n/,/c/en/semiconductor_wafer_processing_single_wafer/n/]",
"@type": "Edge",
"dataset": "/d/opencyc",
"end": {
"@id": "/c/en/semiconductor_wafer_processing_single_wafer/n",
"@type": "Node",
"label": "semiconductor wafer processing single wafer",
"language": "en",
"sense_label": "n",
"term": "/c/en/semiconductor_wafer_processing_single_wafer"
},
"license": "cc:by/4.0",
"rel": {
"@id": "/r/IsA",
"@type": "Relation",
"label": "IsA"
},
"sources": [
{
"@id": "/s/resource/opencyc/2012",
"@type": "Source",
"contributor": "/s/resource/opencyc/2012"
}
],
"start": {
"@id": "/c/en/solder_bump_creation/n",
"@type": "Node",
"label": "solder bump creation",
"language": "en",
"sense_label": "n",
"term": "/c/en/solder_bump_creation"
},
"surfaceText": null,
"weight": 1.0
},
{
"@id": "/a/[/r/IsA/,/c/en/wafer_deposition/n/,/c/en/semiconductor_wafer_processing_single_wafer/n/]",
"@type": "Edge",
"dataset": "/d/opencyc",
"end": {
"@id": "/c/en/semiconductor_wafer_processing_single_wafer/n",
"@type": "Node",
"label": "semiconductor wafer processing single wafer",
"language": "en",
"sense_label": "n",
"term": "/c/en/semiconductor_wafer_processing_single_wafer"
},
"license": "cc:by/4.0",
"rel": {
"@id": "/r/IsA",
"@type": "Relation",
"label": "IsA"
},
"sources": [
{
"@id": "/s/resource/opencyc/2012",
"@type": "Source",
"contributor": "/s/resource/opencyc/2012"
}
],
"start": {
"@id": "/c/en/wafer_deposition/n",
"@type": "Node",
"label": "wafer deposition",
"language": "en",
"sense_label": "n",
"term": "/c/en/wafer_deposition"
},
"surfaceText": null,
"weight": 1.0
},
{
"@id": "/a/[/r/IsA/,/c/en/semiconductor_wafer_processing_single_wafer/n/,/c/en/semiconductor_wafer_processing/n/]",
"@type": "Edge",
"dataset": "/d/opencyc",
"end": {
"@id": "/c/en/semiconductor_wafer_processing/n",
"@type": "Node",
"label": "semiconductor wafer processing",
"language": "en",
"sense_label": "n",
"term": "/c/en/semiconductor_wafer_processing"
},
"license": "cc:by/4.0",
"rel": {
"@id": "/r/IsA",
"@type": "Relation",
"label": "IsA"
},
"sources": [
{
"@id": "/s/resource/opencyc/2012",
"@type": "Source",
"contributor": "/s/resource/opencyc/2012"
}
],
"start": {
"@id": "/c/en/semiconductor_wafer_processing_single_wafer/n",
"@type": "Node",
"label": "semiconductor wafer processing single wafer",
"language": "en",
"sense_label": "n",
"term": "/c/en/semiconductor_wafer_processing_single_wafer"
},
"surfaceText": null,
"weight": 1.0
},
{
"@id": "/a/[/r/IsA/,/c/en/photoresist_deposition/n/,/c/en/semiconductor_wafer_processing_single_wafer/n/]",
"@type": "Edge",
"dataset": "/d/opencyc",
"end": {
"@id": "/c/en/semiconductor_wafer_processing_single_wafer/n",
"@type": "Node",
"label": "semiconductor wafer processing single wafer",
"language": "en",
"sense_label": "n",
"term": "/c/en/semiconductor_wafer_processing_single_wafer"
},
"license": "cc:by/4.0",
"rel": {
"@id": "/r/IsA",
"@type": "Relation",
"label": "IsA"
},
"sources": [
{
"@id": "/s/resource/opencyc/2012",
"@type": "Source",
"contributor": "/s/resource/opencyc/2012"
}
],
"start": {
"@id": "/c/en/photoresist_deposition/n",
"@type": "Node",
"label": "photoresist deposition",
"language": "en",
"sense_label": "n",
"term": "/c/en/photoresist_deposition"
},
"surfaceText": null,
"weight": 1.0
},
{
"@id": "/a/[/r/IsA/,/c/en/primary_metal_layer_creation/n/,/c/en/semiconductor_wafer_processing_single_wafer/n/]",
"@type": "Edge",
"dataset": "/d/opencyc",
"end": {
"@id": "/c/en/semiconductor_wafer_processing_single_wafer/n",
"@type": "Node",
"label": "semiconductor wafer processing single wafer",
"language": "en",
"sense_label": "n",
"term": "/c/en/semiconductor_wafer_processing_single_wafer"
},
"license": "cc:by/4.0",
"rel": {
"@id": "/r/IsA",
"@type": "Relation",
"label": "IsA"
},
"sources": [
{
"@id": "/s/resource/opencyc/2012",
"@type": "Source",
"contributor": "/s/resource/opencyc/2012"
}
],
"start": {
"@id": "/c/en/primary_metal_layer_creation/n",
"@type": "Node",
"label": "primary metal layer creation",
"language": "en",
"sense_label": "n",
"term": "/c/en/primary_metal_layer_creation"
},
"surfaceText": null,
"weight": 1.0
},
{
"@id": "/a/[/r/IsA/,/c/en/photolithography_step/n/,/c/en/semiconductor_wafer_processing_single_wafer/n/]",
"@type": "Edge",
"dataset": "/d/opencyc",
"end": {
"@id": "/c/en/semiconductor_wafer_processing_single_wafer/n",
"@type": "Node",
"label": "semiconductor wafer processing single wafer",
"language": "en",
"sense_label": "n",
"term": "/c/en/semiconductor_wafer_processing_single_wafer"
},
"license": "cc:by/4.0",
"rel": {
"@id": "/r/IsA",
"@type": "Relation",
"label": "IsA"
},
"sources": [
{
"@id": "/s/resource/opencyc/2012",
"@type": "Source",
"contributor": "/s/resource/opencyc/2012"
}
],
"start": {
"@id": "/c/en/photolithography_step/n",
"@type": "Node",
"label": "photolithography step",
"language": "en",
"sense_label": "n",
"term": "/c/en/photolithography_step"
},
"surfaceText": null,
"weight": 1.0
},
{
"@id": "/a/[/r/IsA/,/c/en/n_well_creation/n/,/c/en/semiconductor_wafer_processing_single_wafer/n/]",
"@type": "Edge",
"dataset": "/d/opencyc",
"end": {
"@id": "/c/en/semiconductor_wafer_processing_single_wafer/n",
"@type": "Node",
"label": "semiconductor wafer processing single wafer",
"language": "en",
"sense_label": "n",
"term": "/c/en/semiconductor_wafer_processing_single_wafer"
},
"license": "cc:by/4.0",
"rel": {
"@id": "/r/IsA",
"@type": "Relation",
"label": "IsA"
},
"sources": [
{
"@id": "/s/resource/opencyc/2012",
"@type": "Source",
"contributor": "/s/resource/opencyc/2012"
}
],
"start": {
"@id": "/c/en/n_well_creation/n",
"@type": "Node",
"label": "n well creation",
"language": "en",
"sense_label": "n",
"term": "/c/en/n_well_creation"
},
"surfaceText": null,
"weight": 1.0
},
{
"@id": "/a/[/r/IsA/,/c/en/gate_creation/n/,/c/en/semiconductor_wafer_processing_single_wafer/n/]",
"@type": "Edge",
"dataset": "/d/opencyc",
"end": {
"@id": "/c/en/semiconductor_wafer_processing_single_wafer/n",
"@type": "Node",
"label": "semiconductor wafer processing single wafer",
"language": "en",
"sense_label": "n",
"term": "/c/en/semiconductor_wafer_processing_single_wafer"
},
"license": "cc:by/4.0",
"rel": {
"@id": "/r/IsA",
"@type": "Relation",
"label": "IsA"
},
"sources": [
{
"@id": "/s/resource/opencyc/2012",
"@type": "Source",
"contributor": "/s/resource/opencyc/2012"
}
],
"start": {
"@id": "/c/en/gate_creation/n",
"@type": "Node",
"label": "gate creation",
"language": "en",
"sense_label": "n",
"term": "/c/en/gate_creation"
},
"surfaceText": null,
"weight": 1.0
},
{
"@id": "/a/[/r/IsA/,/c/en/barrier_nitride_stressor_creation/n/,/c/en/semiconductor_wafer_processing_single_wafer/n/]",
"@type": "Edge",
"dataset": "/d/opencyc",
"end": {
"@id": "/c/en/semiconductor_wafer_processing_single_wafer/n",
"@type": "Node",
"label": "semiconductor wafer processing single wafer",
"language": "en",
"sense_label": "n",
"term": "/c/en/semiconductor_wafer_processing_single_wafer"
},
"license": "cc:by/4.0",
"rel": {
"@id": "/r/IsA",
"@type": "Relation",
"label": "IsA"
},
"sources": [
{
"@id": "/s/resource/opencyc/2012",
"@type": "Source",
"contributor": "/s/resource/opencyc/2012"
}
],
"start": {
"@id": "/c/en/barrier_nitride_stressor_creation/n",
"@type": "Node",
"label": "barrier nitride stressor creation",
"language": "en",
"sense_label": "n",
"term": "/c/en/barrier_nitride_stressor_creation"
},
"surfaceText": null,
"weight": 1.0
},
{
"@id": "/a/[/r/IsA/,/c/en/shallow_trench_isolation/n/,/c/en/semiconductor_wafer_processing_single_wafer/n/]",
"@type": "Edge",
"dataset": "/d/opencyc",
"end": {
"@id": "/c/en/semiconductor_wafer_processing_single_wafer/n",
"@type": "Node",
"label": "semiconductor wafer processing single wafer",
"language": "en",
"sense_label": "n",
"term": "/c/en/semiconductor_wafer_processing_single_wafer"
},
"license": "cc:by/4.0",
"rel": {
"@id": "/r/IsA",
"@type": "Relation",
"label": "IsA"
},
"sources": [
{
"@id": "/s/resource/opencyc/2012",
"@type": "Source",
"contributor": "/s/resource/opencyc/2012"
}
],
"start": {
"@id": "/c/en/shallow_trench_isolation/n",
"@type": "Node",
"label": "shallow trench isolation",
"language": "en",
"sense_label": "n",
"term": "/c/en/shallow_trench_isolation"
},
"surfaceText": null,
"weight": 1.0
},
{
"@id": "/a/[/r/IsA/,/c/en/silicide_creation/n/,/c/en/semiconductor_wafer_processing_single_wafer/n/]",
"@type": "Edge",
"dataset": "/d/opencyc",
"end": {
"@id": "/c/en/semiconductor_wafer_processing_single_wafer/n",
"@type": "Node",
"label": "semiconductor wafer processing single wafer",
"language": "en",
"sense_label": "n",
"term": "/c/en/semiconductor_wafer_processing_single_wafer"
},
"license": "cc:by/4.0",
"rel": {
"@id": "/r/IsA",
"@type": "Relation",
"label": "IsA"
},
"sources": [
{
"@id": "/s/resource/opencyc/2012",
"@type": "Source",
"contributor": "/s/resource/opencyc/2012"
}
],
"start": {
"@id": "/c/en/silicide_creation/n",
"@type": "Node",
"label": "silicide creation",
"language": "en",
"sense_label": "n",
"term": "/c/en/silicide_creation"
},
"surfaceText": null,
"weight": 1.0
},
{
"@id": "/a/[/r/IsA/,/c/en/wafer_modification/n/,/c/en/semiconductor_wafer_processing_single_wafer/n/]",
"@type": "Edge",
"dataset": "/d/opencyc",
"end": {
"@id": "/c/en/semiconductor_wafer_processing_single_wafer/n",
"@type": "Node",
"label": "semiconductor wafer processing single wafer",
"language": "en",
"sense_label": "n",
"term": "/c/en/semiconductor_wafer_processing_single_wafer"
},
"license": "cc:by/4.0",
"rel": {
"@id": "/r/IsA",
"@type": "Relation",
"label": "IsA"
},
"sources": [
{
"@id": "/s/resource/opencyc/2012",
"@type": "Source",
"contributor": "/s/resource/opencyc/2012"
}
],
"start": {
"@id": "/c/en/wafer_modification/n",
"@type": "Node",
"label": "wafer modification",
"language": "en",
"sense_label": "n",
"term": "/c/en/wafer_modification"
},
"surfaceText": null,
"weight": 1.0
},
{
"@id": "/a/[/r/IsA/,/c/en/p_well_creation/n/,/c/en/semiconductor_wafer_processing_single_wafer/n/]",
"@type": "Edge",
"dataset": "/d/opencyc",
"end": {
"@id": "/c/en/semiconductor_wafer_processing_single_wafer/n",
"@type": "Node",
"label": "semiconductor wafer processing single wafer",
"language": "en",
"sense_label": "n",
"term": "/c/en/semiconductor_wafer_processing_single_wafer"
},
"license": "cc:by/4.0",
"rel": {
"@id": "/r/IsA",
"@type": "Relation",
"label": "IsA"
},
"sources": [
{
"@id": "/s/resource/opencyc/2012",
"@type": "Source",
"contributor": "/s/resource/opencyc/2012"
}
],
"start": {
"@id": "/c/en/p_well_creation/n",
"@type": "Node",
"label": "p well creation",
"language": "en",
"sense_label": "n",
"term": "/c/en/p_well_creation"
},
"surfaceText": null,
"weight": 1.0
},
{
"@id": "/a/[/r/IsA/,/c/en/pre_gate_implantation/n/,/c/en/semiconductor_wafer_processing_single_wafer/n/]",
"@type": "Edge",
"dataset": "/d/opencyc",
"end": {
"@id": "/c/en/semiconductor_wafer_processing_single_wafer/n",
"@type": "Node",
"label": "semiconductor wafer processing single wafer",
"language": "en",
"sense_label": "n",
"term": "/c/en/semiconductor_wafer_processing_single_wafer"
},
"license": "cc:by/4.0",
"rel": {
"@id": "/r/IsA",
"@type": "Relation",
"label": "IsA"
},
"sources": [
{
"@id": "/s/resource/opencyc/2012",
"@type": "Source",
"contributor": "/s/resource/opencyc/2012"
}
],
"start": {
"@id": "/c/en/pre_gate_implantation/n",
"@type": "Node",
"label": "pre gate implantation",
"language": "en",
"sense_label": "n",
"term": "/c/en/pre_gate_implantation"
},
"surfaceText": null,
"weight": 1.0
}
],
"version": "5.8.1"
}